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INTRODUCTION OF LOGIC GATES
Binary logic deals with binary variables and with operations that assume a logical meaning.It is used to describe, in algebraic or tabular form, the manipulation of processing of binary information.The manipulation of binary information is done by logic circuits called gates. Gates are blocks of hardware that produce signals of binary 1 or 0 when input logic requirement are satisfied. A variety of logic gates are commonly used in digital computer system. Each gate has a distinct graphic symbol and its operation can be described by means of an algebraic expression. The input-output relationship of the binary variables for each gate can be represented in tabular form by a truth table. The basic logic gates are AND, Inclusive OR with multiple inputs and NOT with a single input. Each gate with more than one input is sensitive to either logic 0 or logic 1 input at any one of its input, generating the output according to its function. (more…)
An OR gate is the physical realization of the logical addition (OR) operation. That is, it is an electrical circuit that generates an output signal of 1 only if any of the input signals is also 1. An OR Gate may have two or more inputs and has a single output. Let’s have a look at the circuit Diagram that is shown below to have a proper and understandable view of operation of an OR Gate. (more…)
This Gate circuit provides an output only when the input signal to the Gate is not present. A NOT gate is the physical realisation of the complementation operation. Recall that the complementation operation is unary operation which is defined on a single variable. The NOT Gate circuit has a single input and a single output. The circuit performs the functioning of logic negation in accordance with the following definition: NOT gate is an electronic circuit that generates an output signal which is the reverse of the input signal or it can be defined as too: the output of a NOT Gate takes on state (1) if and only if the input to the circuit takes off state (0) and vice verse. It is also known as an Inverter because NOT gate inverts the input.
TRUTH TABLE AND LOGIC DIAGRAM OF NOT GATE
The truth table and the block diagram symbol for a NOT gate are shown below. A NOT gate always has a single input. Hence there can be only two possibilities of the input signal that are consecutively 0 and 1. When input is 0, the output is 1 and when input is 1 the output is 0. In the block diagram there is a small circle ahead which represents the logic negation.
The picture (b) shows that when A=1, Y=0 because the circle is on the output side and this is the symbol of NOT Gate and it is read as NOT A. The figure (a) shows that when A=0, Y=1 because the circle is input side and it is read as A NOT. From the above figure (c) it is shown that when two NOT gates are connected in series the final result is same as the first input and it gives the output as a Buffer gate. The output equation is Y = A’ (read A complement), where A is the input to the circuit and Y is output.
REALISATION OF NOT GATE BY THE USE OF TRANSISTOR
A NOT Gate cannot be constructed using semi-conductor diodes. We have to take help of a transistor. The picture shown below shows how a NOT Gate is implemented by a N-P-N transistor. In circuit A is input point and Y is output point. Now the Base Current B of the transistor is connected to input point A through a
resistance RB. The emitter current E is earth-connected. And collector current C is in touch with the positive terminal of a 5V battery through a resistance RC, the negative terminal of the battery is earth-connected. The resistance RB and RChave such values that when the Base Current B is supplied with 5V potential a large values of Collector Current flows and the voltage at Y drops and Base Collector junction becomes forward biased. Since there can be two possibilities of the input A hence two different states are generated when A = 0 and When A = 1.STAGE ONE WHEN A=0
When A = 0 the Base-Collector junction is reverse biased and but Base-Emitter junction is forward biased thus no current flows through RC hence at Y a 5V potential remain same which correspond to state 1.
STAGE TWO WHEN A=1
When A = 1 the Base-Collector junction becomes forward biased and thus Base current flows through collector C. Hence a 5V potential is developed across RC and output Y is nearly 0V corresponding to 0.
IMPLEMENTATION OF NOT GATE BY NAND GATE AND NOR GATES
A NOT Gate can be made using a single NAND Gate. The two inputs of a NAND Gate are joined together to form a single input to the circuit. Thus we find that a single input NAND gate behaves as the inverter or NOT gate. In the same way a NOT Gate can be implemented by NOR Gate by joining two input to function as a single input. The Block Diagram of NOT Gate by NAND Gate and NOR Gate is shown here.