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# XOR GATE (EXCLUSIVE-OR)

The exclusive-OR gate is a logic gate which has a graphic symbol similar to the OR gate except for the additional curved line on the input side. The output of this gate is 1 if anyone of the inputs is 1 but excludes the combination when both inputs are either 1 or 0.The exclusive-OR function has its own algebraic symbol or can be expressed in term of AND,OR, and complement operation as shown below.

## TRUTH TABLE AND BLOCK DIAGRAM OF TWO INPUT XOR GATE

A and B are the two inputs of a two input XOR gate or exclusive–OR gate. Y is the output of the XOR gate. The output Y of the exclusive-OR gate is equal to A’B + AB’. When A and B both are equal to 0 the Y output of the XOR gate is 0, and when A and B are either equal to 0 and 1 or 1 and 0 respectively the output Y is 1, and when A and B both are equal to 1 then the output Y of the XOR gate is 0 again. The illustrated block diagram and truth table for two inputs XOR gate is shown here.

## TRUTH TABLE AND LOGIC DIAGRAM OF THREE INPUT XOR GATE

Output of a three input XOR gate is A’B’C + A’BC’ + AB’C’ + ABC. If A, B, and C are the three inputs of the XOR gate and Y is the output of the XOR gate. The output is 1 when only one input is equal to 1 or when all three inputs are equal to 1. The output Y is equal to 0 when two inputs are equal to 1 or when all inputs are equal to 0.

### IMPLEMENTATION OF TWO INPUT XOR GATE USING OR GATE, AND GATE, AND NOT GATE

A XOR gate can be implemented by using AND gate, OR gate, and NOT gate. This implementation is done by using two AND gates, two NOT gates, and one NOT gate. One input of each AND gate is attached with a NOT gate that produces the complement of that input. From the figure it is shown that A and B are the two inputs of the two input XOR gate. From the first AND gate A’.B is produced and from the second AND gate A.B’ is produces, these two output of the two AND gates work as two inputs for the OR gate and the output of the OR gate is A’.B + AB’ which is the output of an of a XOR gate.

### IMPLEMENTATION OF THREE INPUT XOR USING AND GATE, OR GATE, AND NOT GATE

A three input XOR gate is implemented by using four AND gates, three NOT gates, and one OR gate. As we can see that each AND gate has three inputs, first AND gate is attached with complement of A (A’), complement of B (B’), and with the C, similarly the second AND gate is attached with complement of A (A’), with input B, and with the complement of C (C’), the third AND gate is attached with the input A, with the complement of B (B’), and with the complement of C (C’), finally the last AND gate is attached with A,B, and C. The four outputs act as four inputs for the OR gate and output of the OR gate is A’B’C + A’BC’ + AB’C’ + ABC that is equal to the output of the three input XOR gate.

### TWO INPUT XOR GATE USING NAND GATE

A XOR gate can be implemented by the use of only NAND gates because we know that a NAND gate is sufficient to implement any Boolean expression without the use of any other gates.

To make a XOR gate using NAND gate, at first we have to check the function that it is must be in the form of sum-of-products after then we have to take the double complement of the output function of the XOR gate. Let A & B are the two inputs therefore, the output function:
F = A’B + AB’
Taking double complement, we have
or,   (F’)’ = {(A’B + AB’)’}’
or,   (F’)’ = {(A’B)’.(AB’)}’
or,       F = {(A’B)’.(AB’)’}’
Since, the double complement of any variable is itself the variable. Here, A’ and B are the two inputs of the first NAND gate and, A and B’ are the two inputs for the second NAND gate and their respective outputs are (A’B)’ and (AB’)’. These two outputs are again connected to another NAND gate which gives the required result. This is the required circuit diagram of two input XOR gate using NAND gate.

### THREE INPUT XOR GATE USING NAND GATE

Implementation of three input XOR gate using NAND gate is accomplished is the same manner as it was done above. Now, the output equation of three input XOR gate is as follows:

F = A’B’C + A’BC’ + AB’C’ + ABC
Where A, B, and C are the three inputs and F is the output. Now, taking double complement of F, we have
(F’)’ = {(A’B’C + A’BC’ + AB’C’ + ABC)’}’
(F’)’ = {(A’B’C)’.(A’BC’)’.(AB’C’)’.(ABC)’}’
F = {(A’B’C)’.(A’BC’)’.(AB’C’)’.(ABC)’}’
Here, (A’B’C)’, (A’BC’)’, (AB’C’)’, and (ABC)’ are the four outputs of four NAND gates. One more NAND gate is used is obtained the final result. The four outputs of the above NAND gates acts as four inputs for the last NAND gate. The last NAND gate gives the output {(A’B’C)’.(A’BC’)’.(AB’C’)’.(ABC)’}’ and this output is the required output which is equivalent to the output function of XOR gate.

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