A NAND gate is a complemented or inverted AND gate. As it is indicated by the graphic symbol, which consists of an AND gate graphic symbol followed by a small circle which represents a NOT gate. Thus the output of a NAND gate will be 1 if any one of the input is 0 and will be 0 only when all the inputs are 1. Block diagram of two input and three input NAND gates are shown here.

### NAND GATE REALIZATION WITH AN AND GATE AND A NOT GATE

A NAND gate is made by using an AND gate and a NOT gate, the small circle in logic diagram of NAND represent a NOT gate, therefore a NAND gate can be realized as the combination of an AND gate and a NOT gate. The

block diagram given here shows the realization of a two input NAND gate by a two input AND gate and followed by a NOT gate. Here, there are two inputs A and B which are connected to the AND gate and the output produced by the AND gate is AB and it is input to the NOT gate. Therefore, the final output by NOT gate is (AB)’ and this is the required output of the combination which is therefore, equal to the output of a two input NAND gate. In the same manner we can realize a three input NAND gate with a three input AND gate followed by a NOT gate.

## TRUTH TABLE AND LOGIC DIAGRAM OF A TWO INPUT NAND GATE

The logic diagram of a two input NAND gate is given here. It has two inputs A and B and one output Y, where Y = (AB)’ = A’ + B’ (FROM De Morgan’s theorem). The combinations of inputs for two input are as follows A=0 and B=0, A=0 and B=1, A=1and B=0, A=1 and B=1 and their corresponding values of outputs are Y=1, Y=1, Y=1, and Y=0 respectively.

## TRUTH TABLE AND LOGIC DIAGRAM OF A THREE INPUT NAND GATE

Here A, B, and C are the three inputs and Y is the output of three input NAND gate given here. The output of the three input NAND gate is (ABC)’, where A, B, and C are the inputs. This output (ABC)’ can also be written as A’+ B’+ C’ by De Morgan’s theorem.

### WHY NAND GATE IS CALLED UNIVERSAL LOGIC GATE

A NAND gate is called a universal gate because by the use of only NAND gates we can implement the three basic logic gates (AND gate, OR gate, NOT gate) and any other circuits. Since we know that any Boolean expression may be realized by the use of AND gate, OR gate, and NOT gate. But NAND gate is sufficient to implement a Boolean expression without the use of any other gates.

### REALIZATION OF AN BASIC GATES BY NAND GATES

An AND operation is obtained by the use of two NAND gates. The first one produces the inverted AND gate and the second NAND gate being a single input NAND gate produces inverted AND gate which is the output of an AND gate.

For OR gate operation, the normal inputs A and B are first complemented using two single input NAND gates. Now, outputs are fed as input to another NAND gate which produces the output of OR gate.

A NOT gate operation is obtained from a one input NAND gate. Thus we find that a single input NAND gate behaves as the inverter or NOT gate.

### IMPLEMENTATION OF CIRCUIT DIAGRAMS USING NAND GATES

To implement the circuit diagram of a Boolean expression using NAND gate, the expression should be in Sum of Product from otherwise it has to be converted into Sum of Product form. Then take double complement of the expression and find compliment of the inner complement and live the outer complement as it is. Now we can implement our circuit using this changed Boolean expression. Let’s take some Boolean expression and design their circuit diagram using NAND gates.

**Q. Draw the circuit diagram of Boolean function F(X, Y, Z) = YZ + XZ using NAND gates.**

The given Boolean circuit diagram is as follows: F(X, Y, Z) = YZ + XZ since the Boolean expression is already in Sum of Product form therefore we have to take double complement of the expression.

(F’)’

= {(YZ + XZ)’}’

F(X, Y, Z)

= YZ + XZ

= {(YZ + XZ)’}’

F(X, Y, Z)

= YZ + XZ

Double complement has been taken. Now we have to write complement of the inner complement. Thus the expression becomes as

F = {(YZ)’. (XZ)’}’

Since the double complement of F is equal to F. Now we can design our circuit. The circuit diagram of the expression is shown here.

**Q. Design the circuit diagram of the expression F (A, B, C) = AB’C + BC’ using NAND gates only.**

F (A, B, C) = AB’C + BC’The given Boolean expression is F (A, B, C) = AB’C + BC’ and it is in SOP (Sum of Product form). Therefore we have to take double complement of the expression.

F = AB’C + BC’

(F’)’ = {(AB’C + BC’)’}’

F = {(AB’C)’. (BC’)’}’

Now the expression is ready to be designed by NAND gates only. The circuit diagram of the expression is shown here.