A NOR gate is a complemented OR gate, as indicated by the circuit diagram, which consist of an OR gate and followed by a small circle or NOT gate. That is, the output of a NOR gate will be 0 if anyone of the inputs to NOR gate is 1 and the output of NOR gate will be 1 only when all the inputs are 0.LOGIC DIAGRAM OF TWO INPUT AND THREE INPUT NOR GATES


It is made by using an OR gate and a NOT gate, the small circle in logic diagram of NOR gate represent a NOT gate, therefore it can be realized as the combination of an OR gate and a NOT gate. The circuit diagram given below shows the realization of a NOR gate by an OR gate and REALIZATION OF NOR GATE BY AN AND GATE AND A NOT GATEa NOT gate. Here, there are two inputs A and B which are connected to the OR gate and the output produced by the OR gate is A + B and this output of OR gate is the input to the NOT gate. Therefore, the final output generated by the NOT gate is (A + B)’. And this is the required output of the combination that is equal to the output of a two inputs NOR gate. Similarly a three inputs NOR gate can be made by using a three inputs OR gate and a NOT gate.


As we can see from the logic diagram shown here that A and B are two inputs and Y is the output of the two input NOR gate. The output Y of a twLOGIC DIAGRAM OF TWO INPUT NOR GATEo inputs NOR gate is equal to the (A+B)’ or A’.B’ (By De Morgan’s Theorem). For the two inputs it has four combinations and these combinations are A=0 and B=0, A=0 and B=1, A=1 and B=0, A=1 and B=1. When A and B both are equal to 0 the output of the NOR gate is 1, when A and B are equal to 0 and 1 respectively then the output is equal to 0, when A and B are equal to 1 and 0 the output is again equal to 0, and when A and B both are equal to 1 the output is equal to 0 also. The truth table or state table for two inputs NOR gate is as follows.


From the logic diagram of three input NOR gate shown here it is known that A, B, and C are the three inputs and Y is the output of this NOR gate. It can also be seen from the logic diagram that the output Y is equal tLOGIC DIAGRAM OF THREE INPUT NOR GATEo (A+B+C)’ or A’.B’.C’ (By De Morgan’s Theorem). The output Y of the NOR gate is equal to 1 when all the three inputs of NOR gate are equal to 0. The output Y is equal to 0 when anyone input is equal to 1 or two inputs are equal to 1 or all three inputs of the NOR gate are equal to 1.


A NOR gate is called a universal gate because using only this gate we can implement the three basic logic gates AND gate, OR gate and NOT gate and other Boolean expression. Since we know that any Boolean expression may be realized by the use of AND gate, OR gate, and NOT gate. But it is alone sufficient to implement a Boolean expression without the use of any other gates.


An OR operation can be implemented by using only two NOR gates. The first NOR gate produces the inverted OR gate and the seconOR GATE, AND GATE AND NOT BY NOR GATESd NOR gate being a single-input NOR gate produces the invert of the inverted OR gate which is the output of an OR gate.
For AND gate operation, the normal inputs A and B are first complemented using two single input NOR gates. Now, the complemented outputs A’ and B’ are fed as input to another NOR gate which produces the output of an AND gate.

A NOT gate operation is obtained from a single input NOR gate. A single input NOR can be obtained by joining the inputs lines. Thus we find that a single input NOR gate gives output as a NOT gate.


Designing the circuit diagram of a Boolean expression using NOR gate we have to follows some steps which are stated below.CIRCUIT DIAGRAM OF THE EXPRESSION USING NOR GATES If the given Boolean expression is given in POS or Product of Sum form then it is Ok otherwise we have to convert the expression in POS form.
If the given expression is not in POS then before changing the expression into POS we have to change it into Canonical form.
Now to convert from SOP to POS or vice versa interchange those numbers missing from the original form. Take double complement of the Boolean expression.
Now take a Boolean expression which is not given in POS from. Designing the Circuit diagram of the given Boolean expression F (A, B, C) = AB + A’C using NOR gates. The given Boolean expression is as follows:
F (A, B, C) = AB + A’C
Since the given Boolean expression is not in POS form and also not in Canonical form too therefore we have to change it into POS form and canonical form. Let’s change the expression into canonical form.
F (A, B, C) = AB + A’C
In the first term variable C is missing and in second term variable B is missing. Therefore multiply with (C + C’) in first term and (B + B’) in second term. Thus the expression becomes as:
= AB.(C + C’) + A’C.(B + B’)
= ABC + ABC’ + A’BC + A’B’C
Now the expression is in Canonical from we can the write the expression in the standard form as:
F (A, B, C) = ∑ (1, 3, 6, 7)
Now to convert the given SOP form into POS form we have to the function with those terms which are missing. Therefore the required POS form of expression is as follows:
F (A, B, C) = π (0, 2, 4, 5)
F (A, B, C) = (A+B+C)(A+B’+C)(A’+B+C)(A’+B+C’)
Now the expression is converted into POS form therefore we can implement our circuit using NOR gates.
Now take double complement of the expression.
F = (A+B+C)(A+B’+C)(A’+B+C)(A’+B+C’)
(F’)’ = [ {(A+B+C)(A+B’+C)(A’+B+C)(A’+B+C’)}’ ]’
F = [(A+B+C)’ + (A+B’+C)’ + (A’+B+C)’ + (A’+B+C’)’]’

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